1. Field of the Invention
The present invention relates to a CDR (Clock Data Recovery) circuit.
2. Description of the Related Art
In order to transmit and receive data between semiconductor integrated circuits via a small number of data transmission lines, a serial data transmission is employed. In reception of such a serial data signal, each bit data of the serial data is latched at a time point of a clock signal that is in synchronization with the serial data.
In some cases, a clock signal is embedded in the serial data signal. In this case, each transition point of the serial data is monitored by means of a CDR circuit, the clock signal is reproduced based upon the transition points thus detected, and the serial data signal is latched according to the clock signal thus reproduced. Related arts are disclosed in Patent documents 1 and 2.